Requesting a quote for a custom printed circuit board is less about filling in a form and more about translating design intent into a manufacturing plan. Every field a fabricator asks for — board type, layer count, laminate, via style, copper weight, surface finish — corresponds to a real step on the shop floor, and each step carries its own tooling, cycle time and yield risk. When those inputs are vague, the quotation has to be padded with assumptions; when they are precise, the number that comes back is one you can actually compare against alternative designs.
The first cluster of inputs describes the physical board. Is it rigid, flexible or rigid-flex? How many layers? What finished size and thickness? How many pieces, and will they panel efficiently? Rigid constructions begin at single- and double-sided boards and climb from there, with multilayer stacks reaching up to 58 layers in capable facilities. Flex and rigid-flex designs add their own decisions: substrate selection across polyimide (often called Kapton), PET, PEN, LCP and other films, plus copper thickness options that include thick copper flex up to 500 µm. A sculptured flex circuit or a long, large-format flexible board needs to be flagged before pricing, not after.
The second cluster covers conductor geometry and interconnection. Minimum trace width and spacing sets the imaging and etching class — 0.002″/0.002″ is achievable on advanced lines. Copper weight matters too, and heavy copper builds can reach 30 oz. On the interconnect side, the choices multiply quickly: through-hole vias, blind vias, buried vias, laser-drilled microvias filled with epoxy and copper-capped, via-in-pad with conductive or non-conductive fill or a copper plug, and staggered, stacked or skipped microvia arrangements in constructions described as 9+N+9 any-layer HDI. Fine-pitch devices push the requirement further, with BGA pitch down to 0.15 mm. Back drilling for connector stubs carries its own tolerance — a minimum hole size of 15.7 mils and depth tolerance of ±6 mils.
The third cluster is electrical and material performance: target impedance and how tightly it must be held, dielectric constant, loss tangent, thermal expansion behaviour, and whether the stackup will be homogeneous or a hybrid of two laminate families. Only after that do finish and special processes come into play.
The practical way to see how these inputs interact is to run them through a live pricing engine rather than a static list. custom printed circuit board quoting tools generally price layers, laminate, via types and surface finish together, which shows immediately that a material upgrade on two layers costs far less than adding two more layers across the whole stack. That visibility is what turns a quote into a design decision.
Where Layer Count, Laminate Choice and Via Architecture Change the Equation
Layer count is the most visible input, but its effect is indirect. Adding layers does not simply add material; it adds lamination cycles, registration steps, drilling time and opportunities for misalignment. A 4-layer board and a 16-layer board can share a schematic and still behave like entirely different products on the line. This is why quoting tools ask for layer count alongside finished thickness and copper weight — the three together define the stackup, and the stackup defines what the fabricator can promise.
Laminate selection is the second major lever, and it is where cost conversations usually become interesting. Standard polyimide rigid laminates such as Alron85N, Isola P95/P96 and Ventec VT901 cover many high-temperature and general-purpose builds. Low-loss materials — I-Speed, FR408HR, Megtron4, EM-888, N4000-13EP, N4000-13, TU-863+, TU-872LK and similar grades — suit designs where insertion loss starts to matter. High-speed digital stacks move into I-Tera MT40, Tachyon-100G, Megtron6/R-5775, TU-883, TU-883SP, IT-968, and Panasonic MEGTRON 6, 7 and 8 for networking equipment that demands extremely low transmission loss. RF and microwave work calls for a different family altogether: Rogers RO4003C, RO4350B, RO4450F, RO4835, RO4533 and RO3003, Taconic TLY series and RF-35, TSM-DS3, Astra MT77, RT/Duroid 5880, plus Isola ASTRA MT77 and IS680 AG-348. A hybrid stackup that places expensive RF laminate only where the signal actually needs it is often the most economical answer.
Via architecture then decides how much of that material can be used efficiently. Blind and buried vias free up routing space, microvias enable dense fan-out under fine-pitch BGAs, and any-layer HDI removes through-hole congestion entirely. Cavity processes allow components to sit inside the board rather than on top of it, and back drilling removes the stubs that degrade high-speed channels.
Consider a plausible mixed-signal case: a 12-layer board with an RF front end on RO4350B and a digital section on a low-loss laminate, 50-ohm lines held to ±5% impedance tolerance, back-drilled connector stubs, and microvias under a 0.4 mm pitch device. Priced as separate requests, each of those looks like an upgrade. Priced together, with the RF material confined to the layers that need it, the quotation tells a clearer story about where the money actually goes.
Surface Finish, Special Processes and Assembly Scope
Surface finish is the input most often chosen by habit rather than by requirement, and it is worth matching deliberately to the assembly process and the end environment. ENIG (electroless nickel immersion gold) remains a versatile default for fine-pitch SMT work. ENEPIG adds a palladium layer and opens the door to wire bonding. Hard nickel/gold and selective gold plating suit edge connectors and wear surfaces, while gold fingers are specified as their own line item because they involve a separate masking and plating sequence. Wire-bondable gold is its own specification again. At the lower-cost end, immersion silver, immersion tin and organic solderability preservative (OSP) each have a place depending on storage life, contact requirements and the number of reflow cycles the board will see.
Special processes should be listed explicitly rather than assumed. Countersink holes, press-fit holes, castellated holes, semi-flex (bend-but-don’t-fold) constructions and cavity boards all change tooling and inspection. A castellated module, for example, needs the plated half-holes called out in the drill data and the fabrication notes; if they only appear in a drawing comment, the quote may not reflect them.
Assembly scope is the final input and the one that most often arrives late. Board-only pricing assumes the customer handles components and reflow. Turnkey pricing includes stencil and program setup, SMT, through-hole and mixed-technology lines, component sourcing and inspection. Package type drives the equipment list: PBGA, CBGA, TBGA, FPGA, CGA and LGA parts, fine-pitch micro BGA down to 0.4 mm and passives as small as 01005 all need to be named. Board size matters too — assemblies up to 20″ x 24″ fit standard lines. X-ray inspection for BGAs, QFNs and bare boards, IC programming and functional testing are separate services that should appear in the request if they are needed.
Finally, the data package itself is a quote input. Gerber files, drill files, a stackup drawing, impedance targets, finish callouts and clear fabrication notes remove ambiguity, and ambiguity is what turns an estimate into a revision later. Prototype quantities and production volumes belong in the same enquiry, because the answer to “what does this board cost” depends heavily on whether the fabricator is building five or five thousand.
